SPECULIS Request evaluation
TECHNOLOGY

Autopilot and electronic warfare resilience on the same silicon.

Three limits hold conventional autopilots back: timing jitter from software scheduling, fixed silicon that needs a new board for every new protocol, and heavy algorithms that cannot run in true parallel. Speculis removes all three with FPGA hardware.

SIMULATION 01

Try it: attack the navigation.

Switch between normal flight, jamming and spoofing, and watch how each autopilot reacts.

SIMULATION 02

Try it: load the processor.

Add workload and compare a sequential microcontroller loop with parallel FPGA hardware.

SIMULATION · CONTROL LOOP TIMING UNDER LOADPROCESSOR LOAD 35%
CONVENTIONAL MCU LOOPVARYING
Each bar is one control cycle. Tasks share one core, so cycle time stretches and varies as load grows.
SPECULIS FPGA LOOPCONSTANT
Control runs in its own hardware. Extra workload lands elsewhere, the control cycle does not move.
ILLUSTRATIVE MODEL, NOT MEASURED DATA
TRUSTED I/O PROCESSOR

No unverified data reaches the flight core.

Every external sensor input is checked in hardware before the flight control processor sees it, with an AES-256 encrypted datalink to the ground.

GNSS-INDEPENDENT NAVIGATION

The mission continues when GNSS is denied.

FPGA-accelerated LiDAR SLAM and visual-inertial odometry fusion keep the platform on its route.

UPGRADE

Reconfigurable in the field

New sensor protocols, security modules or algorithm updates load as new hardware configurations, without a new board.

FUTURE-PROOF

Ready for post-quantum

The reconfigurable fabric leaves room for future quantum-resistant cryptography on the datalink.

SCALE

ASIC-portable IP

The IP library is written as technology-independent RTL following ASIC-portable design rules.